Thursday, January 30 • 8:00 AM - 8:45 AM Pacific Time (US & Canada)
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Location: Ballroom B
Title: Via Design for 112 Gbps & Beyond: Theory & Reality
Description:
This work presents a novel approach of via structure design and optimization, for 112 and 224 Gbps applications. As data rates go up, via structures are becoming increasingly important for signal integrity yet increasingly challenging in successful real-life implementation due to the necessity of tighter control over via structure properties such as signal reflection, dissipation, and crosstalk at higher frequencies. Via structure design is often becoming the limiting factor for the ultra-high-speed channel performance. To make matters worse via structures electrical performance at high frequencies is often dominated by PCBs and Package manufacturing variations. We explore the physics of via structures, conditions and metrics for signal localization up to 60-80 GHz range. A novel approach is introduced to design for robustness against manufacturing variation, stackup adjustments due to copper density or multi-sourcing support, and geometry variations. We demonstrate a practical design methodology prioritizing low sensitivity to these factors while meeting the low reflection criteria. The paper culminates with insights into the practical discrepancies between theoretical designs and manufactured via structures, bridging the theory with reality.
Type: Technical Paper Session
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